My aim was to be a Nuclear Scientist. When I was in class nine standard I dreamt to work in BARC. But after completing my graduate degree in Physics I joined in Electronics Sc. in my Master degree. At that time I was enthusiastic with computer architecture and Linux. And this enthusiasm has helped me to obtain the highest mark in my M.Sc final final year project, where I have successfully designed a cost effective high frequency oscillator. So after this I have decided to join in M.Tech to enhance the domain knowledge in Hardware. I should say the codesign of Hardware and Software (may be the interfacing work). So I did a lots of study to acquire the knowledge in a HDL language and it is Verilog HDL. To know more about Verilog, my final year project in M.Tech also been gong on with Verilog. This is a good HDL to design a digital circuit.
No comments:
Post a Comment